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As microprocessor and digital signal
processing (DSP) chips become more and more capable, the digital processing
of analog signals, as illustrated in (A) above, becomes more and more
advantageous and feasible. Among the
advantages of digital (vs. analog) processing are that, in digital systems,
many functions may be integrated on a chip (e.g., filtering, differentiation,
integration, linearization, modulation, and computation), systems can be
easily and inexpensively duplicated and reprogrammed, and systems do not
depend on strict component tolerances.
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Before an analog signal can processed,
however, the signal must be converted into digital form. An analog-to-digital (A/D) converter (also
abbreviated ADC) samples the analog signal at (usually) equal intervals of time,
and converts the analog signal into a sequence of digitized values (i.e., the
analog signal is sampled, measured, then converted into quantized numerical
values), as illustrated in (B) above.
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One of the sources of error in ADCs is
jitter, i.e., the uncertainty in the time the signal was sampled. As shown in (C), an error t in the time of
the sampling causes an error V in the measured value of the signal. The higher the
resolution (number of bits) and the speed of the ADC, the smaller the
allowable jitter. At GHz frequencies, some 16 bit ADC clock jitter
requirements are a few femtoseconds.
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Phase noise of the oscillator that drives
the clock is one of the sources of timing jitter. The oscillator’s
contribution to jitter is the integral of the phase noise, L(f), usually from
10 Hz to ~30 MHz.
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J. A. Wepman,
“Analog-to-Digital Converters and Their Applications in Radio Receivers,”
IEEE Communications Magazine, pp. 39-45, May 1995.
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R. J. Lackey and D.
W Upmal, “Speakeasy: The Military Software Radio,” IEEE Communications
Magazine, pp. 56-61, May 1995.
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